Compared to a conventional class-AB amplifier, a class-G amplifier may be configured to dynamically adjust a power voltage and greatly improve power efficiency and is widely utilized in audio applications. Please refer to FIG. 1, which is a structural diagram of a conventional class-G amplifier circuit 10 with a digital input. The conventional class-G amplifier circuit 10 includes a digital front end circuit 102, a digital-to-analog converter (DAC) 104, a class-AB amplifier 106, a charge-pump control logic circuit 108 and a charge pump circuit 110. The charge-pump control logic circuit 108 adjusts an output voltage of the charge pump circuit 110 according to an input signal, such that the charge pump circuit 110 may transform among different voltage modes.
To avoid larger inrush currents generated when transforming modes, before the conventional charge pump circuit 110 is transformed from a ⅓VDD mode to a VDD mode, the conventional charge pump circuit 110 enters a soft ramp-up mode, an output voltage of the charge pump circuit 110 is charged by a smaller fixed current. After the charge pump circuit 110 is charged for a fixed time period, the charge pump circuit 110 enters the VDD mode. When the charge pump circuit 110 is transformed from the VDD mode to the ⅓VDD mode, a three-phase soft switching is utilized for transforming the output voltage to the ⅓VDD mode. However, a charging time period of the conventional charge pump circuit 110 is fixed during the soft ramp-up mode. If the charging period is not long enough, the charge pump circuit 110 enters the VDD mode and huge inrush currents are generated, which causes distortions when the class-G amplifier circuit is applied on the audio and generates pop noises. In contrast, if the charging period is too long, a ramp-up process of the output voltage is too slow and causes clipping of the output voltage of the class-G amplifier circuit and distortions. In addition, the charging time of the output voltage of the charge pump circuit 100 is easily affected by an output device and loading current, which makes digital control logic of the class-G amplifier circuit difficult. Moreover, a time period needed for the transformation to the ⅓VDD is directly related to the loading current and output capacitors. When the time period is too short, the output voltage of the charge pump circuit 100 cannot be reduced to the ⅓VDD mode. In contrast, if the time period is too long, the output voltage is lower than ⅓VDD due to a huge impedance caused by the soft switching of the charge pump circuit 100, which generates huge inrush currents.
Therefore, how to provide a charge pump circuit capable of minimizing the inrush currents during the mode transformations, so as to avoid circumstances of distortions caused by the pop noises or clipping and optimize the efficiency of the amplifier, has been an object in the industry.